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Integrated circuit design for radiation environments /
正題名/作者 ： Integrated circuit design for radiation environments // Stephen J. Gaul ... [et al.].
其他作者 ： Gaul, Stephen J.,
出版者 ： Hoboken, NJ :Wiley,2020.
面頁冊數 ： xxxviii, 350 p. :ill. ;25 cm.
標題 ： Integrated circuits - Design and construction. -
ISBN ： 9781119966340 (hbk.)
ISBN ： 9781118701874 (adobe pdf)
ISBN ： 9781118701850 (epub)
LEADER 02222cam 2200205 a 450
001 312450
005 20200515161209.0
008 190618s2020 njua b 001 0 eng
010 $a 2019025698
020 $a9781119966340 (hbk.)
020 $a9781118701874 (adobe pdf)
020 $a9781118701850 (epub)
035 $a00366085
050 00$aTK7874$b.G379 2020
082 00$a621.3815$223
090 $a621.3815/In8///UM064017
245 00$aIntegrated circuit design for radiation environments /$cStephen J. Gaul ... [et al.].
260 $aHoboken, NJ :$bWiley,$c2020.
300 $axxxviii, 350 p. :$bill. ;$c25 cm.
504 $aIncludes bibliographical references and index.
520 $a"The authors structure the book so that readers can understand the problem of radiation effects 1st, then understand the skills of layout design and ciruit design after. Chapter One and Chapter Two introduce semiconductors and radiation environments including space, atmospheric and terrestrial environments. Chapter Three details radiation and semiconductor physics. It discusses elementary particle physics so that readers can see how the areas of semiconductors and fundamental interact. Radioactive decay, field equations and transistors are presented in this section too. Damage mechanisms in semiconductors is covered in Chapter Four, including coverage of radiation damage in silicon devices. This leads on logically to single event effects in the next chapter, covering single event upset (SEU), single event gate rupture (SEGR), single event transient (SET), single event latchup (SEL), and radiation techniques. Chapter Six presents radiation-hard semiconductor process and layout techniques, with information on off-the-shelf process technology, and device specific hardening methods. Helpful SEU semiconductor process solutions for SEU are covered in detail in Chapter Seven. Solutions covered include: wells, p-wells, isolation, triple-well, sub-collectors, deep trench and more. Chapter Eight goes into detail on the area of SEU circuit solutions, while Chapter Nine details latchup semiconductor process solutions. Chapter Ten presents Latchup circuit solutions and concluds with a look at emerging effects in future technologies"--$cProvided by publisher.
650 0$aIntegrated circuits$xDesign and construction.$3361375
650 0$aSemiconductors$xEffect of radiation on.$3559324
700 1 $aGaul, Stephen J.,$d1957-$3559323
Integrated circuit design for radiation environments /Stephen J. Gaul ... [et al.]. - Hoboken, NJ :Wiley,2020. - xxxviii, 350 p. :ill. ;25 cm.
Includes bibliographical references and index.
"The authors structure the book so that readers can understand the problem of radiation effects 1st, then understand the skills of layout design and ciruit design after. Chapter One and Chapter Two introduce semiconductors and radiation environments including space, atmospheric and terrestrial environments. Chapter Three details radiation and semiconductor physics. It discusses elementary particle physics so that readers can see how the areas of semiconductors and fundamental interact. Radioactive decay, field equations and transistors are presented in this section too. Damage mechanisms in semiconductors is covered in Chapter Four, including coverage of radiation damage in silicon devices. This leads on logically to single event effects in the next chapter, covering single event upset (SEU), single event gate rupture (SEGR), single event transient (SET), single event latchup (SEL), and radiation techniques. Chapter Six presents radiation-hard semiconductor process and layout techniques, with information on off-the-shelf process technology, and device specific hardening methods. Helpful SEU semiconductor process solutions for SEU are covered in detail in Chapter Seven. Solutions covered include: wells, p-wells, isolation, triple-well, sub-collectors, deep trench and more. Chapter Eight goes into detail on the area of SEU circuit solutions, while Chapter Nine details latchup semiconductor process solutions. Chapter Ten presents Latchup circuit solutions and concluds with a look at emerging effects in future technologies"--
ISBN: 9781119966340 (hbk.)
LCCN: 2019025698Subjects--Topical Terms:
361375
Integrated circuits
--Design and construction.
LC Class. No.: TK7874 / .G379 2020
Dewey Class. No.: 621.3815
Includes bibliographical references and index.
"The authors structure the book so that readers can understand the problem of radiation effects 1st, then understand the skills of layout design and ciruit design after. Chapter One and Chapter Two introduce semiconductors and radiation environments including space, atmospheric and terrestrial environments. Chapter Three details radiation and semiconductor physics. It discusses elementary particle physics so that readers can see how the areas of semiconductors and fundamental interact. Radioactive decay, field equations and transistors are presented in this section too. Damage mechanisms in semiconductors is covered in Chapter Four, including coverage of radiation damage in silicon devices. This leads on logically to single event effects in the next chapter, covering single event upset (SEU), single event gate rupture (SEGR), single event transient (SET), single event latchup (SEL), and radiation techniques. Chapter Six presents radiation-hard semiconductor process and layout techniques, with information on off-the-shelf process technology, and device specific hardening methods. Helpful SEU semiconductor process solutions for SEU are covered in detail in Chapter Seven. Solutions covered include: wells, p-wells, isolation, triple-well, sub-collectors, deep trench and more. Chapter Eight goes into detail on the area of SEU circuit solutions, while Chapter Nine details latchup semiconductor process solutions. Chapter Ten presents Latchup circuit solutions and concluds with a look at emerging effects in future technologies"--
ISBN: 9781119966340 (hbk.)
LCCN: 2019025698Subjects--Topical Terms:
361375
Integrated circuits
--Design and construction.
LC Class. No.: TK7874 / .G379 2020
Dewey Class. No.: 621.3815
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